1. Field of the Invention
This invention generally relates to integrated circuit (IC) fabrication and, more particularly, to a method and tool for IC imaging failure analysis, especially stacked IC dies where access can only be obtained from the side.
2. Description of the Related Art
IC devices are formed from a die of active semiconductor devices. The die can be mounted in a hybrid circuit, printed circuit board (PCB), or a package. For environmental protection, the die may be covered by a passivation layer. However, a package is more typically used since it also dissipates heat and provides a lead system for electrical connections. There are many different types of packages including through-hole, surface mount device (SMD) dual/quad, and SMD area array packages.
FIGS. 1A and 1B are perspective views of a dual in-line package (DIP) and an IC die without a package, respectively (prior art). It is common for a package body or lead frame 100 to have a die attach area 102. The die 106 has electrical contact pads on its top surface. Inner leads 108 connect pads on die top surface to outer leads or lead frames 110. Once the inner leads are bonded to the lead frames, the package is sealed with ceramic, in a metal can, or in a polyimide. Epoxy resins are also a common choice. Glass beads are commonly mixed in with the epoxy to reduce strain in the epoxy film during changes in temperature.
Optical beam induced current (OBIC) is a semiconductor analysis technique performed using laser signal injection. The technique induces current flow in the semiconductor sample through the use of a laser light source. By monitoring current flow or voltage changes on the leads, and cross-referencing to the position of the laser, it is possible estimate the particular devices being effected. This technique is used in semiconductor failure analysis to locate buried diffusion regions, damaged junctions, and gate oxide shorts.
FIG. 9 depicts an exemplary system for inducing current flow by creating optical paths through an IC package (prior art). Selected power pins from the IC are connected to a sense amp 900, as are the IC grounds. A laser 902 scans an area of an IC package 904 overlying the die (not shown). The scanning area is defined by an x-y coordinate system. The IC package 904 is mounted on a movable table 906. Alternately, the IC package position is fixed and the laser moves. The scan pattern need not necessarily follow the x-y grid. In some aspects, only selected areas of the package surface over the die are scanned.
FIG. 10 is a detailed schematic of a sense amplifier (prior art). The sense amplifier connects lines V+ and S+ to IC power supply lines, while inputs V− and S− are typically connected to ground. In other aspects, the sense amplifier lines may be connected to signal inputs or signal outputs.
Imaging is performed through the top or the bottom of the package with the epoxy compound intact. Electrical connections are made to the power supply pins of the device and those connections go to a current amplifier for video imaging the package surface as the OBIC laser is scanned. The OBIC laser has a 1065 nanometers wavelength and does not ablate the epoxy mold compound. This wavelength will generate electron hole pairs in the semiconductor die and create a current if the laser light reaches the die surface (and the junctions are not covered by metal).
The OBIC technique may be used to detect the point at which a focused ion beam (FIB) milling operation in bulk silicon of an IC must be terminated. This is accomplished by using a laser to induce a photocurrent in the silicon, while simultaneously monitoring the magnitude of the photocurrent by connecting an ammeter to the device's power and ground. As the bulk silicon is thinned, the photocurrent increases as the depletion region of the well to substrate junction is reached. FIB milling operations are terminated in a region below the well depth, so the device remains operational.
IC dies are fabricated from multiple layers of metal, silicon active devices, interconnections, and dielectric insulation. Typically, one or more metal layer is located near the top of the die for the purpose of distributing power and to act as ground. Since lasers cannot image through these metal layers, laser imaging for fault location is commonly performed from the back of the die to produce an image in the X-Y plane using a technique that is commonly called TIVA (thermally induced voltage alteration). Defects are often more thermally sensitive than non defect sites.
FIG. 2 is a partial cross-sectional view of an IC made from a stack of dies (prior art). A new generation of IC devices is emerging that vertically stacks a plurality of dies. Even if the bottom-most die can be investigated using a conventional TIVA technique, its metal layers prevent TIVA analysis the overlying dies.
Therefore, new analysis techniques are required. CAT SCANS (x-rays) and NMR imaging produce two and three dimensional images by combining information from multi-directions initially collected individually.
It would be advantageous the two and three dimensional imaging techniques developed for medicine could be applied to the analysis of ICs. It would be advantageous if a die could be analyzed in multiple dimensions using an TIVA tool.